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 APLUS
MAKE YOUR PRODUCTION A-PLUS
ASM0402C DATA SHEET
APLUS
INTEGRATED CIRCUITS INC.
Sales E-mail: Mr. Jason sales@aplusinc.com.tw Technology E-mail: Mr. George service@aplusinc.com.tw
Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115) 32 3 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw
ASM0402C
ASM0402C - VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR
1.0 General Description The ASM0402C is very low cost voice synthesizer with 4-bit microprocessor. It has various features including 4-bit ALU, ROM, RAM, I/O ports, timers, clock generator, watchdog timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function can minimize power dissipation. Its architecture is similar to RISC, with two stages of instruction pipeline. It allows all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles). 1.1 Feature Single power supply can operate from 2.4V through 5V Internal Program ROM: 2K x 10-bit 1 sets of 14-bit DPR can access up to 16K x 10 bits data memory space Data Registers: * 48 x 4-bit data RAM (00-1Fh plus 40h-4Fh) * Unbanked special function registers (SFR) range: 20h-3Fh I/O Ports: * PRA: 2-bit I/O Port A (2Bh) On-chip clock generator: Resistive Clock Drive(RM) Timer: 1 * Timer0: a 9-bit auto-reload timer/counter Stack: 2-level subroutine nesting HALT and Release from HALT function to reduce power consumption Watch Dog Timer (WDT) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles Number of instruction: 22 The Voice function can be implemented by microprocessor instruction * One 8-bit COUT output for ASMxxxxx
1
Rev 1.0
ASM0402C
FIGURE 1.1 : Block Diagram of ASM0402C
Data Bus[3:0] ROM Latch PCL(4) PC[11:0] (ADDR[13:12]) =00b ADDR[13:0] Stack(12) (2-Level) 0 ROM_ADDR[13:0] 1 DPR3,2,1 DPR[13:0] Program (Data) ROM Instruction Latch Instruction Bus [9:0] Instruction Decoder
PCLATCH(8) PCH(8)
DLATCH(10) ROM_Data[9:0]
Data Bus[3:0] Accumlator(4)
Instruction Bus [9:0]
SRAM
ALU(4) Register(4) Immediate(4) (48 x 4) 00h-1Fh 40h-4Fh
Timer0(9)
PRA(2)
weak or strong pull-low for PRA P1,P2,P3,P4 enter test mode
( Voice synthesizer )
Clock Generator Test select Power on Reset RESET pin PRA0
OSC VDD/GND
PRASL(2)
One-Channel
Reset Chip Reset Chip
COUT
COUT
2
Rev 1.0
Instruction Bus [9:0]
Control Signal
ASM0402C
FIGURE 1.2 : External ROM Map of ASM0402C
PC[11:0]
12bit x 2 STACK 14-bit Data Pointer Reset Vector
00000h
00080h
Reserved for Testing
Program and data ROM
00080h-003FFh 00400h 00000h-007FFh
00000h-03FFFh
007FFh(2K)
Data ROM
03FFFh(16Kx10-bits)
3
Rev 1.0
ASM0402C
1.2 Pin-Out ASM0402C Pin-Out
VDD PRA1 PRA0/RESET I I/O I/O Power supply during operation STI I/O port with programmable strong pull-low or weak pull-low or fix-inputStd./O.D. floating capability Output type with standard or Open-Drain output STI I/O port with programmable strong pull-low or weak pull-low or fix-inputStd./O.D. floating capability Output type with standard or Open-Drain output Mask option selected as an external RESET pin with weak pull-low capability RM mode Oscillator input Current Output of Audio Circuit Ground Potential Enter Test Mode. ( TEST = High )
OSC COUT GND TEST
I O I O
1.3 Application circuit
ASM0402C
4
Rev 1.0
ASM0402C
1.4 Bonding Diagram
16K x 10 bit ROM
Y=1030+100 (um)
ASM0402C
CHIP SIZE: X= 1560+100(um) , Y= 1030+100(um)
1
2
3
4
5
6
7
X = 1560+100(um)
ASM0402C Pad Location PAD # PAD Name 1 COUT 2 RA_PAD[1] 3 RA_PAD[0]/RESET 4 OSC_PAD 5 GND Chip Size: X=1560+100 (um), Y=1030+100 (um) Y PAD # PAD Name X Y 6 TEST_PAD -509.92 -430.32 507.6 -430.32 7 VDD -203.2 -430.32 677.52 -430.32 X
-9.04 117.25 -347.6
-430.32 -430.32 -430.32
5
Rev 1.0
ASM0402C
1.5 DC Characteristics for ASMxxxxx SYMBOL VDD Isb Iop PARAMETER OPERATING VOLTAGE SUPPLY CURREN T
STANDBY OPERATING
VDD MIN. TYP. MAX. UNIT 2.4 3 5 3 5 3 5 5 3 5 3 5 -10 -20 3 5 1 1 2 7 3 9 -5.2 -3 -8 7 20 10 20 V uA mA
CONDITION depending on Freq. 4MHz, RM in HALT Mode 4MHz, RM IO Floating 4MHz, RM in HALT Mode (IO Ports with weak pull-high pull-low) 4MHz, RM (IO ports) Fosc(3v)Fosc(2.4v) Fosc (3v) VDD=3V, Rosc=910k, 4MHz
Iih
INPUT CURRENT /Internal pull low OUTPUT HIGH CURRENT OUTPUT LOW CURRENT FREQUENCY STABILITY Fosc VARIATION
uA
Ioh Iol dF/F dF/F
mA
% %
FIGURE 1.3 : Frequency Range for Rosc in RM mode
Resistor(k ohm) 3v Freq.(MHz)
1200 3.125
1000 3.785
R o sc & Fre q .
820 4.445
470 7.2
8 Freq. MHz 6 4 2 0 0 200 400
7 .2 4 .4 4 5
3 .7 8 5
3 .1 2 5
600
800
1000
1200
1400
R o sc k o h m
6
Rev 1.0


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